MC68EN360AI25L

Communications Controller, PGA, 32-Bit, Background Debug Mode, Up to 32-Bit Data Bus

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Price:: US $0.10~0.10 / piece [Get Latest Price]

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PartNumber:: MC68EN360AI25L

Brand:: Freescale Semiconductor, Inc - Freescale | Pack: QFP | D/C: 06+

Availability:: Supply Ability: 10000/Week Can Ship Immediately
Delivery: 10-15 Business Days (ships out within 3 Business days)

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Products Upload time: 2011-11-12

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Part Number:MC68EN360AI25L
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Product Summary

The MC68EN360AI25L QUad Integrated Communication Controller (QUICC) is a versatile onechip integrated microprocessor and peripheral combination that can be used in a variety of controller applications. It particularly excels in communications activities. The QUICC (pronounced quick) can be described as a next-generation MC68EN360AI25L with higher performance in all areas of device operation, increased flexibility, major extensions in capability, and higher integration. The term quad comes from the fact that there are four serial communications controllers (SCCs) on the device; however, there are actually seven serial channels: four SCCs, two serial management controllers (SMCs), and one serial peripheral interface (SPI).

Parametrics

MC68EN360AI25L absolute maximum ratings: (1)Supply Voltage, VCC: –0.3 to +6.5 V; (2)Input Voltage, Vin: –0.3 to +6.5 V; (3)Operating Temperature Range, TA: 0 to 70℃; (4)Maximum operating Junction Temperature, TJ: 115℃; (5)Minimum operation Ambient Temperature (BGA only), TA: 0℃; (6)Storage Temperature Range, Tstg: –55 to +150℃.

Features

MC68EN360AI25L features: (1)CPU32+ Processor (4.5 MIPS at 25 MHz); (2)2-Bit Version of the CPU32 Core (Fully Compatible with the CPU32); (3)Background Debug Mode; (4)Byte-Misaligned Addressing; (5)Up to 32-Bit Data Bus (Dynamic Bus Sizing for 8 and 16 Bits); (6)Up to 32 Address Lines (At Least 28 Always Available); (7)Complete Static Design (0-25-MHz Operation); (8)RISC Controller; (9)Many New Commands (e.g., Graceful Stop Transmit, Close RxBD); (10)224 Buffer Descriptors; (11)Supports Continuous Mode Transmission and Reception on All Serial Channels; (12)2.5 Kbytes of Dual-Port RAM; (13)14 Serial DMA (SDMA) Channels; (14)Three Parallel I/O Registers with Open-Drain Capability; (15)Each Serial Channel Can Have Its Own Pins (NMSI Mode).